Invention Grant
- Patent Title: Process for fabricating printed circuit assembly and printed circuit assembly thereof
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Application No.: US15883664Application Date: 2018-01-30
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Publication No.: US10537024B2Publication Date: 2020-01-14
- Inventor: Joseph Alfred Iannotti
- Applicant: GENERAL ELECTRIC COMPANY
- Applicant Address: US NY Schenectady
- Assignee: General Electric Company
- Current Assignee: General Electric Company
- Current Assignee Address: US NY Schenectady
- Agency: The Small Patent Law Group, LLC
- Agent Phillip S. Hof
- Main IPC: H05K1/14
- IPC: H05K1/14 ; H05K3/36 ; H05K1/02

Abstract:
A process for fabricating a printed circuit assembly is presented. The process includes providing a first base substrate having a first surface and a second surface opposite to the first surface; providing a flexible circuit layer including a first region having a first set of signal traces and a second region having a second set of signal traces, wherein the first region and the second region are separated by a first intermediate region; disposing the first region of the flexible circuit layer on the first surface of the first base substrate; bending the flexible circuit layer at the first intermediate region to surround a thickness side of the first base substrate; and disposing the second region of the flexible circuit layer on the second surface of the first base substrate. A printed circuit assembly is also presented.
Public/Granted literature
- US20190239355A1 PROCESS FOR FABRICATING PRINTED CIRCUIT ASSEMBLY AND PRINTED CIRCUIT ASSEMBLY THEREOF Public/Granted day:2019-08-01
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