Invention Grant
- Patent Title: Tracking and managing translation lookaside buffers
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Application No.: US15592089Application Date: 2017-05-10
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Publication No.: US10540291B2Publication Date: 2020-01-21
- Inventor: Krystof C. Zmudzinski , Carlos V. Rozas , Francis X. McKeen , Rebekah M. Leslie-Hurd , Meltem Ozsoy , Somnath Chakrabarti , Mona Vij
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/1027
- IPC: G06F12/1027 ; G06F12/1009 ; G06F12/14 ; G06F9/455

Abstract:
Translation lookaside buffer (TLB) tracking and managing technologies are described. A processing device comprises a translation lookaside buffer (TLB) and a processing core to execute a virtual machine monitor (VMM), the VMM to manage a virtual machine (VM) including virtual processors. The processing core to execute, via the VM, a plurality of conversion instructions on at least one of the virtual processors to convert a plurality of non-secure pages to a plurality of secure pages. The processing core also to execute, via the VM, one or more allocation instructions on the at least one of the virtual processors to allocate at least one secure page of the plurality of secure pages, execution of the one or more allocation instructions to include determining whether the TLB is cleared of mappings to the at least one secure page prior to allocating the at least one secure page.
Public/Granted literature
- US20180329829A1 TRACKING AND MANAGING TRANSLATION LOOKASIDE BUFFERS Public/Granted day:2018-11-15
Information query
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