Invention Grant
- Patent Title: Semiconductor test system with flexible and robust form factor
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Application No.: US15892931Application Date: 2018-02-09
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Publication No.: US10551411B2Publication Date: 2020-02-04
- Inventor: Scott E. Caudle , Wenshui Zhang , Raymond A. Booher
- Applicant: SILICON LABORATORIES INC.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agent Gary Stanford; James W. Huffman
- Main IPC: G01R1/04
- IPC: G01R1/04 ; G01R31/26

Abstract:
A test system for testing semiconductor chips including a docking plate, a test card, chip sockets, a stiffener, and test electronics. Each test card has a uniform card configuration that may be used with any of several different handlers. Each test card includes conductive pads electrically coupled to and longitudinally offset from a socket interface along a length of the test card. The stiffener includes a test interface including conductive pins for electrically interfacing the conductive pads of the test card. The test card is supported by the stiffener so that it remains undeformed as each chip is plunged into a test socket. The test interface includes a basin that is covered by the test card to form a thermal isolation cavity for thermal separation from the test electronics. A uniform radio frequency interface is provided between each test card and a corresponding test interface.
Public/Granted literature
- US20190250188A1 SEMICONDUCTOR TEST SYSTEM WITH FLEXIBLE AND ROBUST FORM FACTOR Public/Granted day:2019-08-15
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