Disclosed are an array substrate and a liquid crystal display panel. The array substrate includes a plurality of gate lines and a plurality of data lines. The plurality of gate lines and the plurality of data lines are interleaved to form a plurality of pixel areas, and a pixel electrode is formed in each of the pixel areas. The pixel electrode is connected to a corresponding gate line and a corresponding data line via a thin film transistor. The array substrate further includes a common electrode, which is connected to a first pixel electrode and a second electrode via a thin film transistor. A signal in the first pixel electrode and a signal in the second pixel electrode have opposite polarities. The array substrate realizes automatic adjustment of a common electrode voltage, and corresponding regulators or machines are no longer needed. It is favorable to improvement of productivity and competitiveness of the array substrate and the liquid crystal display panel.