Invention Grant
- Patent Title: Unblock instruction to reverse page block during paging
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Application No.: US15854278Application Date: 2017-12-26
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Publication No.: US10552344B2Publication Date: 2020-02-04
- Inventor: Carlos V. Rozas , Ittai Anati , Francis X. McKeen , Krystof Zmudzinski , Ilya Alexandrovich , Somnath Chakrabarti , Dror Caspi , Meltem Ozsoy
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/14
- IPC: G06F12/14 ; G06F12/08 ; G06F12/10 ; G06F3/06 ; G06F12/0806 ; G06F12/0868 ; G06F12/1009 ; G06F12/1027 ; G06F12/128

Abstract:
A secure enclave circuit stores an enclave page cache map to track contents of a secure enclave in system memory that stores secure data containing a page having a virtual address. An execution unit is to, in response to a request to evict the page from the secure enclave: block creation of translations of the virtual address; record one or more hardware threads currently accessing the secure data in the secure enclave; send an inter-processor interrupt to one or more cores associated with the one or more hardware threads, to cause the one or more hardware threads to exit the secure enclave and to flush translation lookaside buffers of the one or more cores; and in response to detection of a page fault associated with the virtual address for the page in the secure enclave, unblock the creation of translations of the virtual address.
Public/Granted literature
- US20190196982A1 UNBLOCK INSTRUCTION TO REVERSE PAGE BLOCK DURING PAGING Public/Granted day:2019-06-27
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