Invention Grant
- Patent Title: Providing task-triggered deterministic operational mode for simultaneous multi-threaded superscalar processor
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Application No.: US14988964Application Date: 2016-01-06
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Publication No.: US10572261B2Publication Date: 2020-02-25
- Inventor: Alistair Paul Robertson , James Andrew Collier Scobie
- Applicant: Alistair Paul Robertson , James Andrew Collier Scobie
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30

Abstract:
A task identifier-based mechanism is configured to temporarily disable a dual-issue capability of one or more threads in a superscalar simultaneous multi-threaded core. The core executes a first thread and a second thread which are each provided with a dual-issue capability wherein up to two instructions may be issued in parallel. In response to a task identifier being received that is indicative of a task requiring an improved level of determinism, the dual-issue capability of at least one of the first thread or the second thread is temporarily disabled.
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