Memory in pixel display device with low power consumption
Abstract:
A pixel circuit includes a pixel control unit, a first switching unit, a second switching unit, an inverter, a memory capacitor, and a pixel capacitor. The pixel control unit is coupled to a source line and a gate line. The first switching unit has a first terminal coupled to the pixel control unit, and a second terminal. The inverter has an input terminal coupled to the second terminal of the first switching unit, and an output terminal. The memory capacitor is coupled to the first terminal of the first switching unit and receives a first voltage or a second voltage higher than the first voltage. The second switching unit has a first terminal coupled to the pixel control unit, and a second terminal coupled to the output terminal of the inverter. The pixel capacitor is coupled to a common line and the output terminal of the inverter.
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