Invention Grant
- Patent Title: Multilane heterogeneous serial bus
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Application No.: US16204401Application Date: 2018-11-29
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Publication No.: US10579581B2Publication Date: 2020-03-03
- Inventor: Radu Pitigoi-Aron , Richard Dominic Wietfeldt
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza LLP
- Main IPC: G06F13/42
- IPC: G06F13/42

Abstract:
Systems, methods, and apparatus are described that enable a serial bus to be operated in one or more modes that employ additional wires for communicating data. A method includes configuring a first interface to exchange data over two primary wires of a serial bus in accordance with a first I3C protocol, and configuring a second interface to communicate over at least one secondary wire in accordance with a second I3C protocol. In one example, the first data is encoded in a sequence of symbols representing signaling state of the two primary wires. A recovered clock signal may be derived from transitions between symbol transmission intervals in the first interface may be used to control double data rate communication through the second interface.
Public/Granted literature
- US20190266122A1 MULTILANE HETEROGENUOUS SERIAL BUS Public/Granted day:2019-08-29
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