Invention Grant
- Patent Title: Calculation apparatus and processing apparatus
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Application No.: US15979005Application Date: 2018-05-14
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Publication No.: US10581366B2Publication Date: 2020-03-03
- Inventor: Reiji Yamasaki , Yoshitaro Kondo
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2017-127794 20170629
- Main IPC: H02P27/08
- IPC: H02P27/08 ; H02M7/5387 ; H02M1/08 ; H02P6/16 ; H02M1/00

Abstract:
A calculation apparatus 100 includes an encoder 101 configured to detect rising edges of PWM signals having at least three or more phases in each of the phases, and a register 103 configured to store, at a timing after the PWM signals having the respective phases rise and after AD conversion of a current value of a drive signal of a motor obtained by the PWM signals, a difference value between the AD-converted current value and a previous AD-converted current value for each phase.
Public/Granted literature
- US20190006978A1 CALCULATION APPARATUS AND PROCESSING APPARATUS Public/Granted day:2019-01-03
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