- Patent Title: Trench isolated IC with transistors having LOCOS gate dielectric
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Application No.: US16010691Application Date: 2018-06-18
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Publication No.: US10586730B2Publication Date: 2020-03-10
- Inventor: Ming-Yeh Chuang
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Andrew R. Ralston; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L29/78 ; H01L29/66 ; H01L21/761 ; H01L29/40 ; H01L29/06 ; H01L29/10 ; H01L29/423

Abstract:
An electronic device includes an isolated region surrounded by an isolation ring over a semiconductor substrate. A well of a first conductivity type is located within the isolated region. A source region and a drain region of a second conductivity type are located over the well. A local-oxidation-of-silicon (LOCOS) layer is located on the well between the source and the drain, between the source and the isolation ring, and between the drain and the isolation ring. A gate electrode located between the source and the drain on said LOCOS layer.
Public/Granted literature
- US20180308745A1 TRENCH ISOLATED IC WITH TRANSISTORS HAVING LOCOS GATE DIELECTRIC Public/Granted day:2018-10-25
Information query
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