An array substrate, a display panel, and a display device are provided. The array substrate includes a substrate, and a plurality of scanning lines and a plurality of data lines disposed on the substrate. The plurality of scanning lines and the plurality of data lines are insulated and intersected to define a plurality of pixel units. Each pixel unit includes a thin film transistor and a pixel electrode, a gate electrode of the thin film transistor is electrically connected to a scanning line, a source electrode is electrically connected to a data line, and a drain electrode is electrically connected to the pixel electrode. An active layer of the thin film transistor includes at least one channel region including first sub-channel region and at least one second sub-channel region. A first width of the first sub-channel region is smaller than a second width of the second sub-channel region.