A stage of a gate driving circuit includes: a first control transistor diode-connected between a first input end of the stage and a first node, biased by a first input signal, and back-biased by a second input signal; a second control transistor including a control end which receives a third input signal, a first end connected to the first node, and a second end connected to a first voltage, and back-biased by a fourth input signal; a first output transistor including a control end connected to the first node, a first end connected to a clock input end of the stage, and a second end connected to a first output end of the stage; and a capacitor connected between the control and second ends of the first output transistor. The second input signal and the fourth input signal have enable levels during different periods.