Invention Grant
- Patent Title: Power grid, IC and method for placing power grid
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Application No.: US15651165Application Date: 2017-07-17
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Publication No.: US10672709B2Publication Date: 2020-06-02
- Inventor: Hiranmay Biswas , Kuo-Nan Yang , Chung-Hsing Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: G06F30/394
- IPC: G06F30/394 ; H01L23/528 ; H01L23/50 ; H01L23/522 ; G06F30/392 ; G06F119/06

Abstract:
A power grid of an integrated circuit (IC) is provided. The power grid includes a plurality of first power lines formed in a first metal layer, a plurality of second power lines formed in the first metal layer and parallel to the first power lines, a plurality of third power lines formed in a second metal layer, and a plurality of fourth power lines formed in the second metal layer and parallel to the third power lines. The first and second power lines are interlaced in the first metal layer. The third and fourth power lines are interlaced in the second metal layer. Distances from the individual first power line to the two adjacent second power lines are the same, and distances from the individual third power line to the two adjacent fourth power lines are different.
Public/Granted literature
- US20180166386A1 POWER GRID, IC AND PLACEMENT METHOD FOR POWER GRID Public/Granted day:2018-06-14
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