Wirelessly synchronized clock networks
Abstract:
A system includes a first device comprising a first clock generating circuit and a transmitter circuit, and a plurality of second devices, each comprising a respective receiver circuit and a respective second clock generating circuit. The first clock generating circuit may be configured to generate a first clock signal, which may provide internal clocking for the first device. The transmitter circuit may be configured to generate a synchronization signal in response to the first clock signal and wirelessly transmit a broadcast signal communicating only the synchronization signal. The respective receiver circuit may be configured to receive the broadcast signal and present a recovered synchronization signal to the respective second clock generating circuit. The respective second clock generating circuit may be configured to generate a respective intermediate clock signal, synchronize the respective intermediate clock signal with the recovered synchronization signal, and generate a respective second clock signal that provides internal clocking for the second device.
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