Invention Grant
- Patent Title: Wirelessly synchronized clock networks
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Application No.: US16363116Application Date: 2019-03-25
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Publication No.: US10687293B2Publication Date: 2020-06-16
- Inventor: Jagdeep Bal , Elie Ayache , Eduard Van Keulen
- Applicant: Integrated Device Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Integrated Device Technology, Inc.
- Current Assignee: Integrated Device Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Christopher P. Maiorana, PC
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L7/04 ; H04W56/00

Abstract:
A system includes a first device comprising a first clock generating circuit and a transmitter circuit, and a plurality of second devices, each comprising a respective receiver circuit and a respective second clock generating circuit. The first clock generating circuit may be configured to generate a first clock signal, which may provide internal clocking for the first device. The transmitter circuit may be configured to generate a synchronization signal in response to the first clock signal and wirelessly transmit a broadcast signal communicating only the synchronization signal. The respective receiver circuit may be configured to receive the broadcast signal and present a recovered synchronization signal to the respective second clock generating circuit. The respective second clock generating circuit may be configured to generate a respective intermediate clock signal, synchronize the respective intermediate clock signal with the recovered synchronization signal, and generate a respective second clock signal that provides internal clocking for the second device.
Public/Granted literature
- US20190223128A1 WIRELESSLY SYNCHRONIZED CLOCK NETWORKS Public/Granted day:2019-07-18
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