A computing apparatus configured to perform software verification and validation is provided. The computing apparatus includes a processor coupled to a main memory, and a write only memory module, wherein the processor is configured to execute an application under test. The application under test is configured to write output data to the main memory. The processor directs the output data to the write only memory module and transfers the output data to the main memory when the execution of the application under test is successful, or erases the output data from the write only memory module when the execution of the application under test is unsuccessful.