Invention Grant
- Patent Title: In-datagram critical-signaling using pulse-count-modulation for I3C bus
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Application No.: US15882494Application Date: 2018-01-29
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Publication No.: US10693674B2Publication Date: 2020-06-23
- Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , Radu Pitigoi-Aron
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza LLP
- Main IPC: H04L12/40
- IPC: H04L12/40 ; G06F13/42 ; H04L25/49 ; H04L1/16

Abstract:
Systems, methods, and apparatus are described that enable a device to indicate availability of priority data to be communicated over a half-duplex serial bus without waiting for an ongoing transmission to be completed. In-datagram critical signaling is accommodated without breaking backward compatibility. A method implemented at a transmitting device coupled to a serial bus includes transmitting a data byte over a first line of the serial bus to a receiving device in accordance with a clock signal transmitted by a master device on a second line of the serial device, detecting a first pulse on the first line of the serial bus during a cycle of the clock signal designated for an acknowledgement or negative acknowledgement by the second device, and processing an alert indicated by the first pulse.
Public/Granted literature
- US20190238362A1 IN-DATAGRAM CRITICAL-SIGNALING USING PULSE-COUNT-MODULATION FOR I3C BUS Public/Granted day:2019-08-01
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