• Patent Title: Methods of fabricating semiconductor structures including cavities filled with a sacrificial material
  • Application No.: US15328371
    Application Date: 2014-06-11
  • Publication No.: US10703627B2
    Publication Date: 2020-07-07
  • Inventor: Mariam SadakaLudovic Ecarnot
  • Applicant: Soitec
  • Applicant Address: FR Crolles
  • Assignee: Soitec
  • Current Assignee: Soitec
  • Current Assignee Address: FR Crolles
  • Agency: TraskBritt
  • International Application: PCT/EP2014/062137 WO 20140611
  • International Announcement: WO2014/206737 WO 20141231
  • Main IPC: B81C1/00
  • IPC: B81C1/00 B81B1/00
Methods of fabricating semiconductor structures including cavities filled with a sacrificial material
Abstract:
Methods of forming semiconductor structures comprising one or more cavities, which may be used in the formation of microelectromechanical system (MEMS) transducers, involve forming one or more cavities in a first substrate, providing a sacrificial material within the one or more cavities, bonding a second substrate over a surface of the first substrate, forming one or more apertures through a portion of the first substrate to the sacrificial material, and removing the sacrificial material from within the one or more cavities. Structures and devices are fabricated using such methods.
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