Invention Grant
- Patent Title: 3D memory device including shared select gate connections between memory blocks
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Application No.: US16228534Application Date: 2018-12-20
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Publication No.: US10706930B2Publication Date: 2020-07-07
- Inventor: Aaron Yip
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; G11C16/04 ; H01L27/11524 ; H01L27/1157 ; H01L27/11556 ; G11C16/26 ; G11C16/14 ; G11C16/08 ; H01L27/11575
Abstract:
Some embodiments include apparatuses, and methods of operating the apparatuses. Some of the apparatuses include a data line, a first memory cell string including first memory cells located in different levels of the apparatus, first access lines to access the first memory cells, a first select gate coupled between the data line and the first memory cell string, a first select line to control the first select gate, a second memory cell string including second memory cells located in different levels of the apparatus, second access lines to access the second memory cells, the second access lines being electrically separated from the first access lines, a second select gate coupled between the data line and the second memory cell string, a second select line to control the second select gate, and the first select line being in electrical contact with the second select line.
Public/Granted literature
- US20190147954A1 3D MEMORY DEVICE INCLUDING SHARED SELECT GATE CONNECTIONS BETWEEN MEMORY BLOCKS Public/Granted day:2019-05-16
Information query
IPC分类:
