Invention Grant
- Patent Title: Cavity wall structure for semiconductor packaging
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Application No.: US16056541Application Date: 2018-08-07
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Publication No.: US10707161B2Publication Date: 2020-07-07
- Inventor: Hua Hong Tan , Wilson Poh Leng Ong , Kriangsak Sae Le , Saravuth Sirinorakul , Somsak Phukronghin , Paweena Phatto
- Applicant: UTAC Headquarters Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UTAC Headquarters Pte. Ltd.
- Current Assignee: UTAC Headquarters Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Horizon IP Pte Ltd
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/055 ; H01L23/16 ; H01L23/31 ; H01L21/52 ; H01L21/56 ; H01L23/04 ; H01L23/24 ; H01L23/00

Abstract:
An improved method for forming a semiconductor package is disclosed herein. The method includes forming a multi-layer package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate comprises a recess region. A semiconductor die is attached to the die region within the recess region. A dam structure is formed within the recess region. The dam structure surrounds the semiconductor die and extends upward to a height below the first major surface of the package substrate. A liquid encapsulant material is dispensed into the recess region. The liquid encapsulant material is surrounded by the dam structure. The liquid encapsulant extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.
Public/Granted literature
- US20190043797A1 CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING Public/Granted day:2019-02-07
Information query
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