公开(公告)号：US11139233B2

公开(公告)日：2021-10-05

申请号：US16886728

申请日：2020-05-28

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Hua Hong Tan ,  Wilson Poh Leng Ong ,  Kriangsak Sae Le ,  Saravuth Sirinorakul ,  Somsak Phukronghin ,  Paweena Phatto

IPC: H01L23/498 ,  H01L23/16 ,  H01L21/48 ,  H01L23/31 ,  H01L21/52 ,  H01L21/56 ,  H01L23/055 ,  H01L23/04 ,  H01L23/24 ,  H01L23/00

Abstract: A method for forming a semiconductor package is disclosed herein. The method includes forming a package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate includes a recess region below the first major surface defined with a die region and a non-die region surrounding the die region. A semiconductor die is disposed in the die region within the recess region. A dam structure is disposed within the recess region. The dam structure surrounds the semiconductor die and extends upwardly to a height below the first major surface of the package substrate. The method also includes dispensing a liquid encapsulant material into the recess region. The liquid encapsulant material is surrounded by the dam structure and extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.

公开(公告)号：US20240003768A1

公开(公告)日：2024-01-04

申请号：US18334402

申请日：2023-06-14

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Paweena Phatto ,  Maythichai Saithong ,  Eakkasit Dumsong ,  Jiraphat Charoenratpratoom

IPC: G01L9/00 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: G01L9/0045 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48108 ,  H01L2224/73215 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2924/1659 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/16151

Abstract: A semiconductor device has a substrate and a first electrical component including a sensing region disposed over the substrate. The sensing region can be responsive to external stimuli, such as pressure. A cover lid is disposed over the first electrical component and extending to the substrate with an opening in the cover lid aligned over the sensing region. A gel material is disposed within the opening of the cover lid to seal the sensing region with respect to an environment condition, such as liquid. A bond wire is coupled between the first electrical component and substrate. An adhesive layer is disposed around a perimeter of the sensing area and the cover lid is bonded to the adhesive layer. A second electrical component is disposed on the substrate and the first electrical component is disposed on the second electrical component.

公开(公告)号：US10707161B2

公开(公告)日：2020-07-07

申请号：US16056541

申请日：2018-08-07

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Hua Hong Tan ,  Wilson Poh Leng Ong ,  Kriangsak Sae Le ,  Saravuth Sirinorakul ,  Somsak Phukronghin ,  Paweena Phatto

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/055 ,  H01L23/16 ,  H01L23/31 ,  H01L21/52 ,  H01L21/56 ,  H01L23/04 ,  H01L23/24 ,  H01L23/00

Abstract: An improved method for forming a semiconductor package is disclosed herein. The method includes forming a multi-layer package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate comprises a recess region. A semiconductor die is attached to the die region within the recess region. A dam structure is formed within the recess region. The dam structure surrounds the semiconductor die and extends upward to a height below the first major surface of the package substrate. A liquid encapsulant material is dispensed into the recess region. The liquid encapsulant material is surrounded by the dam structure. The liquid encapsulant extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.

公开(公告)号：US11784102B2

公开(公告)日：2023-10-10

申请号：US17389294

申请日：2021-07-29

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Eakkasit Dumsong ,  Mike Jayson Candelario ,  Phongsak Sawasdee ,  Jiraphat Charoenratpratoom ,  Paweena Phatto ,  Maythichai Saithong

IPC: H01L23/053 ,  H01L21/52 ,  H01L23/00

CPC classification number: H01L23/053 ,  H01L21/52 ,  H01L23/564

Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die cavity with a die attached therein. The package substrate also includes a cavity for bonding a cap thereto to form a hermetic package. The cap is bonded to the cavity using sealing rings.