Invention Grant
- Patent Title: Semiconductor device with interconnect to source/drain
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Application No.: US15897570Application Date: 2018-02-15
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Publication No.: US10707330B2Publication Date: 2020-07-07
- Inventor: Hans-Juergen Thees , Peter Baars , Elliot John Smith
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/8234 ; H01L29/66 ; H01L29/49 ; H01L29/786 ; H01L29/423 ; H01L21/285 ; H01L27/12 ; H01L21/306 ; H01L21/308 ; H01L21/8238

Abstract:
A method of manufacturing a semiconductor device is provided including providing an SOI substrate comprising a semiconductor bulk substrate, a buried insulation layer and a semiconductor layer, forming a shallow trench isolation in the SOI substrate, forming a FET in and over the SOI substrate, and forming a contact to a source or drain region of the FET that is positioned adjacent to the source or drain region, wherein forming the shallow trench isolation includes forming a trench in the SOI substrate, filling a lower portion of the trench with a first dielectric layer, forming a buffer layer over the first dielectric material layer, the buffer layer having a material different from a material of the first dielectric layer, and forming a second dielectric layer over the buffer layer and of a material different from the material of the buffer layer.
Public/Granted literature
- US20190252522A1 SEMICONDUCTOR DEVICE WITH INTERCONNECT TO SOURCE/DRAIN Public/Granted day:2019-08-15
Information query
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