Invention Grant
- Patent Title: Controlling dimensions of a negative capacitance layer of a gate stack of a field-effect transistor (FET) to increase power density
-
Application No.: US16002459Application Date: 2018-06-07
-
Publication No.: US10714582B2Publication Date: 2020-07-14
- Inventor: Bin Yang , Ye Lu , Lixin Ge
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: W&T/Qualcomm
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/51 ; G11C11/22 ; H01L29/423 ; H01L29/49

Abstract:
A Field-Effect Transistor (FET) with a negative capacitance layer to increase power density provides a negative capacitor connected in series with a conventional positive capacitor. The dimensions of the negative capacitor are controlled to allow the difference in capacitances between the negative capacitor and the positive capacitor to approach zero, which in turn provides a large total capacitance. The large total capacitance provides for increased power density.
Public/Granted literature
Information query
IPC分类: