发明授权
- 专利标题: PLL circuit
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申请号: US16419222申请日: 2019-05-22
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公开(公告)号: US10715152B2公开(公告)日: 2020-07-14
- 发明人: Shunichi Kubo , Yusuke Fujita
- 申请人: THINE ELECTRONICS, INC.
- 申请人地址: JP Chiyoda-ku, Tokyo
- 专利权人: THINE ELECTRONICS, INC.
- 当前专利权人: THINE ELECTRONICS, INC.
- 当前专利权人地址: JP Chiyoda-ku, Tokyo
- 代理机构: Sughrue Mion, PLLC
- 优先权: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2acacad5
- 主分类号: H03L7/099
- IPC分类号: H03L7/099 ; H03L7/097
摘要:
A PLL circuit of one embodiment has a structure for preferably setting the FV characteristic of an LC-VCO. The PLL circuit includes a voltage controlled oscillator, a phase comparator, a charge pump, a loop filter, and an FV characteristic adjustment unit setting the FV characteristic. The voltage controlled oscillator has an FV characteristic indicating the relationship between a control signal and a frequency and outputs an oscillation signal having a frequency corresponding to the control signal based on the FV characteristic. The phase comparator detects a phase difference between an input signal and the control signal. The charge pump outputs a corrected voltage value changed according to the phase difference. The loop filter outputs a control voltage value changed in response to corrected voltage value variations. The FV characteristic adjustment unit generates an FV characteristic control signal by a mean corrected voltage value.
公开/授权文献
- US20190363722A1 PLL CIRCUIT 公开/授权日:2019-11-28
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