Invention Grant
- Patent Title: Counter integrity tree for memory security
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Application No.: US15892770Application Date: 2018-02-09
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Publication No.: US10733313B2Publication Date: 2020-08-04
- Inventor: Prakash S. Ramrakhyani , Roberto Avanzi , Wendy Arnott Elsasser
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Leveque IP Law, P.C.
- Main IPC: G06F21/62
- IPC: G06F21/62 ; G06F3/06 ; G06F21/64 ; G06F21/78

Abstract:
A counter integrity tree for memory security includes at least one split-counter node specifying at least two counters each defined as a combination of a major count value shared between the at least two counters and a respective minor count value specified separately for each of the at least two counters. This increases the number of child nodes which can be provided per parent node of the tree, and hence reduces the number of tree levels that have to be traversed in a tree covering a given size of memory region. The minor counter size can be varied dynamically by allocating nodes in a mirror counter integrity tree for accommodating larger minor counters which do not fit in the corresponding node of the main counter integrity tree.
Public/Granted literature
- US20190251275A1 COUNTER INTEGRITY TREE FOR MEMORY SECURITY Public/Granted day:2019-08-15
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