Invention Grant
- Patent Title: Low overhead mapping for highly sequential data
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Application No.: US16201733Application Date: 2018-11-27
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Publication No.: US10754555B2Publication Date: 2020-08-25
- Inventor: Timothy Canepa , Jeffrey Munsil , Jackson Ellis , Mark Ish
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Fremont
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Fremont
- Agency: Hall Estill Attorneys at Law
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F3/06

Abstract:
Method and apparatus for managing data in a memory, such as a flash memory. A memory module has a non-volatile memory (NVM) and a memory module electronics (MME) circuit configured to program data to and read data from solid-state non-volatile memory cells of the NVM. A map structure associates logical addresses of user data blocks with physical addresses in the NVM at which the user data blocks are stored. A controller circuit arranges the user data blocks into map units (MUs), and directs the MME circuit to write the MUs to a selected page of the NVM. The controller circuit updates the map structure to list only a single occurrence of a physical address for all of the MUs written to the selected page. The map structure is further updated to list an MU offset and an MU length for each of the MUs written to the selected page.
Public/Granted literature
- US20190095341A1 LOW OVERHEAD MAPPING FOR HIGHLY SEQUENTIAL DATA Public/Granted day:2019-03-28
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