Invention Grant
- Patent Title: Three-dimensional semiconductor devices having vertical structures of different lengths
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Application No.: US15352890Application Date: 2016-11-16
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Publication No.: US10763222B2Publication Date: 2020-09-01
- Inventor: Jaeho Jeong , Sunyoung Kim , Jang-Gn Yun , Hoosung Cho , Sunghoi Hur
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@785f8d2f
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/522 ; H01L23/528 ; H01L23/544 ; H01L27/11524 ; H01L27/11556 ; H01L27/1157 ; H01L27/11582

Abstract:
Three-dimensional (3D) semiconductor devices may be provided. A 3D semiconductor device may include a substrate including a chip region and a scribe line region, a cell array structure including memory cells three-dimensionally arranged on the chip region of the substrate, a stack structure disposed on the scribe line region of the substrate and including first layers and second layers that are vertically and alternately stacked, and a plurality of vertical structures extending along a vertical direction that is perpendicular to a top surface of the substrate and penetrating the stack structure.
Public/Granted literature
- US20170148748A1 THREE-DIMENSIONAL SEMICONDUCTOR DEVICES WITH SCRIBE LINE REGION STRUCTURES Public/Granted day:2017-05-25
Information query
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