Invention Grant
- Patent Title: High linearity digital-to-analog converter with ISI-suppressing method
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Application No.: US16515056Application Date: 2019-07-18
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Publication No.: US10763884B2Publication Date: 2020-09-01
- Inventor: Chuan-Hung Hsiao , Sung-Han Wen , Kuan-Ta Chen
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H03M1/68
- IPC: H03M1/68 ; H03M1/06 ; H03M7/36

Abstract:
A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.
Public/Granted literature
- US20200028519A1 HIGH LINEARITY DIGITAL-TO-ANALOG CONVERTER WITH ISI-SUPPRESSING METHOD Public/Granted day:2020-01-23
Information query
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