A device for determining a received signal as minimum values of a set of values, the device comprising a processor configured to: load a first set of values in a register; identify a maximum value of the first set of values and a minimum value of the first set of values; in the register, replace the maximum value by a value of a second set of values and simultaneously replace the minimum value by a new value, calculated based on the minimum value, to receive an updated first set of values; and repeat previous steps until all values of the updated first set of values are replaced by values of the second set of values.