Invention Grant
- Patent Title: Three-phase inverter with reduced DC bus capacitor ripple
-
Application No.: US16279179Application Date: 2019-02-19
-
Publication No.: US10778116B2Publication Date: 2020-09-15
- Inventor: Junichi Itoh , Koroku Nishizawa , Akio Toba , Akihiro Odaka
- Applicant: National University Corporation Nagaoka University of Technology , FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Niigata JP Kawasaki-shi, Kanagawa
- Assignee: National University Corporation Nagaoka University of Technology,FUJI ELECTRIC CO., LTD.
- Current Assignee: National University Corporation Nagaoka University of Technology,FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Niigata JP Kawasaki-shi, Kanagawa
- Agency: IPUSA, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1ec7e3fe
- Main IPC: H02M7/537
- IPC: H02M7/537 ; H02M1/14

Abstract:
A three-phase inverter includes three series circuits that are connected in parallel to a capacitor connected in parallel to a DC voltage source. Each of the three series circuits includes two semiconductor switching elements connected in series. A connection point between the two semiconductor switching elements is used as an AC output terminal for each phase. The three-phase inverter generates PWM pulses of three phases including a PWM pulse of one phase, whose pulse width of a positive side pulse in one switching cycle is the largest, and including PWM pulses of the other two phases such that a positional relationship between positive side pulses of the other two phases is a positional relationship in which an overlapping range on a time axis is smaller as compared with a state in which a positive side pulse of one phase encompasses a positive side pulse of the other pulse.
Public/Granted literature
- US20190334454A1 THREE-PHASE INVERTER Public/Granted day:2019-10-31
Information query
IPC分类: