- 专利标题： SRAM with local bit line, input/output circuit, and global bit line
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申请号： US16273527申请日： 2019-02-12
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公开(公告)号： US10783938B2公开(公告)日： 2020-09-22
- 发明人: Atul Katoch , Ali Taghvaei
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址： TW
- 代理机构： Merchant & Gould P.C.
- 主分类号： G11C7/06
- IPC分类号： G11C7/06 ; G11C7/12 ; G11C7/10 ; G11C11/4091 ; G11C7/18 ; G11C16/04 ; G11C11/419
摘要：
A memory device Input/Output includes a memory cell having a local bit line. A first IO circuit is coupled to the local bit line and is configured to output a local IO signal to a global bit line. A second IO circuit is coupled to the global bit line and is configured to output a global IO signal. A latch circuit is configured to latch the local IO signal in response to a data signal on the local bit line.
公开/授权文献
- US20200005837A1 SRAM INPUT/OUTPUT 公开/授权日：2020-01-02
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