Invention Grant
- Patent Title: Isolation with multi-step structure for FinFET device and method of forming the same
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Application No.: US16211949Application Date: 2018-12-06
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Publication No.: US10790184B2Publication Date: 2020-09-29
- Inventor: Ta-Chun Lin , Tien-Shao Chuang , Kuang-Cheng Tai , Chun-Hung Chen , Chih-Hung Hsieh , Kuo-Hua Pan , Jhon-Jhy Liaw
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L27/092 ; H01L21/762 ; H01L21/8234 ; H01L21/8238

Abstract:
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate including a first well region and a second well region that have different conductivity types and are adjacent to each other. A first fin structure protrudes from the semiconductor substrate and is formed in the first well region. A second fin structure protrudes from the semiconductor substrate and is formed in the second well region and adjacent to the first fin structure. A first multi-step isolation structure that includes a first isolation portion is formed between the first fin structure and the second fin structure. A second isolation portion extends from the bottom surface of the first isolation portion. The second isolation portion has a top width that is narrower than the bottom width of the first isolation portion.
Public/Granted literature
- US20200105612A1 ISOLATION WITH MULTI-STEP STRUCTURE FOR FINFET DEVICE AND METHOD OF FORMING THE SAME Public/Granted day:2020-04-02
Information query
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