Invention Grant
- Patent Title: Semiconductor device including a passivation spacer and method of fabricating the same
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Application No.: US15984524Application Date: 2018-05-21
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Publication No.: US10790186B2Publication Date: 2020-09-29
- Inventor: Jiseok Hong , Chan-Sic Yoon , Ilyoung Moon , Jemin Park , Kiseok Lee , Jung-Hoon Han
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2ae950ae
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532 ; H01L23/522

Abstract:
A method of fabricating a semiconductor device includes providing a substrate, and forming an interlayered insulating layer on the substrate. The method includes forming a preliminary via hole in the interlayered insulating layer. The method includes forming a passivation spacer on an inner side surface of the preliminary via hole. The method includes forming a via hole using the passivation spacer as an etch mask. The method includes forming a conductive via in the via hole. The passivation spacer includes an insulating material different from an insulating material included in the interlayered insulating layer.
Public/Granted literature
- US20190122919A1 SEMICONDUCTOR DEVICE INCLUDING A PASSIVATION SPACER AND METHOD OF FABRICATING THE SAME Public/Granted day:2019-04-25
Information query
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