Invention Grant
- Patent Title: Semiconductor device with fin end spacer dummy gate and method of manufacturing the same
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Application No.: US16104692Application Date: 2018-08-17
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Publication No.: US10797174B2Publication Date: 2020-10-06
- Inventor: Kai-Tai Chang , Tung Ying Lee , Wei-Sheng Yun , Tzu-Chung Wang , Chia-Cheng Ho , Ming-Shiang Lin , Tzu-Chiang Chen
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L21/762 ; H01L21/768 ; H01L21/8238 ; H01L21/033 ; H01L21/02 ; H01L23/532
Abstract:
A semiconductor device includes a plurality of fins on a substrate. A fin liner is formed on an end surface of each of the plurality of fins. An insulating layer is formed on the plurality of fins. A plurality of polycrystalline silicon layers are formed on the insulating layer. A source/drain epitaxial layer is formed in a source/drain space in each of the plurality of fins. One of the polycrystalline silicon layers is formed on a region spaced-apart from the fins.
Public/Granted literature
- US20200058784A1 SEMICONDUCTOR DEVICE WITH FIN END SPACER DUMMY GATE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2020-02-20
Information query
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