Threshold computation circuit for S-FSK receiver, integrated circuit, and method associated therewith
Abstract:
A threshold computation circuit includes an input circuit, a maximum filter circuit, a minimum filter circuit, and a calculating circuit. The input circuit receives a discrete frequency signal from a digital filtering circuit. The discrete frequency signal is based on an S-FSK waveform received by an S-FSK receiver associated with the digital filtering circuit. The discrete frequency signal is representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. The maximum filter circuit adjusts a maximum amplitude parameter based on the discrete frequency signal and a predetermined threshold. The minimum filter circuit adjusts a minimum amplitude parameter based on the discrete frequency signal and the predetermined threshold. The calculating circuit adapts the predetermined threshold for a next data frame based on the maximum and minimum amplitude parameters. An integrated circuit and a method for computing the threshold are also disclosed.
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