Invention Grant
- Patent Title: Method of fabricating a semiconductor device with an overlay key pattern
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Application No.: US16361546Application Date: 2019-03-22
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Publication No.: US10825777B2Publication Date: 2020-11-03
- Inventor: Taehong Min , Chan Hwang
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@fade1b3
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L45/00

Abstract:
A method of fabricating a semiconductor device includes providing a substrate including a first region and a second region. The method includes forming a first layer on the substrate. The first layer has a first hole on the first region and a second hole on the second region. The method includes forming a second layer in the first hole and the second hole. The method includes forming a mask pattern on the second region of the substrate. The method includes polishing the second layer to form a pattern in the first hole and an overlay key pattern in the second hole. A top surface of the overlay key pattern is further from the substrate than a top surface of the pattern in the first hole.
Public/Granted literature
- US20190363054A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2019-11-28
Information query
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