Invention Grant
- Patent Title: Apparatuses and methods for reducing read disturb
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Application No.: US16182355Application Date: 2018-11-06
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Publication No.: US10854301B2Publication Date: 2020-12-01
- Inventor: Feng Pan , Ramin Ghodsi , Qiang Tang
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/26 ; G11C16/04 ; G11C16/08 ; G11C16/16 ; G11C16/24

Abstract:
Apparatuses and methods for reducing read disturb are described herein. An example apparatus may include a first memory subblock including a first select gate drain (SGD) switch and a first select gate source (SGS) switch, a second memory subblock including a second SGD switch and a second SGS switch, and an access line associated with the first and second memory subblocks. The apparatus may include a control unit configured to enable the first and second SGD switches and the first and second SGS switches during a first portion of a read operation and to provide a first voltage on the access line during the first portion. The control unit may be configured to disable the first SGD switch and the first SGS switches during a second portion of the read operation and to provide a second voltage on the access line during the second portion.
Public/Granted literature
- US20190074070A1 APPARATUSES AND METHODS FOR REDUCING READ DISTURB Public/Granted day:2019-03-07
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