Invention Grant
- Patent Title: Vertical semiconductor memory device structures including vertical channel structures and vertical dummy structures
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Application No.: US16454914Application Date: 2019-06-27
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Publication No.: US10886288B2Publication Date: 2021-01-05
- Inventor: Hongsoo Kim , Hyunmog Park , Joongshik Shin
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: KR10-2017-0023114 20170221
- Main IPC: H01L27/11551
- IPC: H01L27/11551 ; H01L27/11582 ; H01L29/66 ; H01L29/792 ; H01L27/06 ; H01L27/11578 ; H01L21/822 ; H01L27/11563 ; H01L27/11568 ; H01L27/11565 ; H01L27/1157 ; H01L27/11575 ; H01L27/11521 ; H01L27/11556 ; H01L27/11514
Abstract:
A vertical memory device structure can include a vertical channel structure that vertically penetrates through an upper structure and a lower structure of a stack structure in a cell array region of the device. The vertical channel structure can have a side wall with a stepped profile at a level in the vertical channel structure where the upper structure meets the lower structure. A vertical dummy structure can vertically penetrate through a staircase structure that is defined by the upper structure and the lower structure in a connection region of the device, and the vertical dummy structure can have a side wall with a planar profile at the level where the upper structure meets the lower structure.
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