A method for manufacturing a semiconductor memory device includes forming a plurality of source lines spaced apart from each other on a dielectric layer, forming a plurality of spacers on sides of the plurality of source lines, and forming a plurality of drain lines on the dielectric layer adjacent the plurality of source lines including the plurality of spacers formed thereon. In the method, a metal oxide layer is formed on the plurality of source lines and on the plurality of drain lines, and a plurality of gate lines are formed on the metal oxide layer. The plurality of gate lines are oriented perpendicular to the plurality of drain lines and the plurality of source lines.