Invention Grant

Dual width FinFET
Abstract:
A dual width SOI FinFET is disclosed in which different portions of a strained fin have different widths. A method of fabrication of such a dual width FinFET entails laterally recessing the strained fin in the source and drain regions using a wet chemical etching process so as to maintain a high degree of strain in the fin while trimming the widths of fin portions in the source and drain regions to less than 5 nm. The resulting FinFET features a wide portion of the fin in the channel region underneath the gate, and a narrower portion of the fin in the source and drain regions. An advantage of the narrower fin is that it can be more easily doped during the growth of the epitaxial raised source and drain regions.
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