Invention Grant
- Patent Title: Dual width FinFET
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Application No.: US15806160Application Date: 2017-11-07
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Publication No.: US10886386B2Publication Date: 2021-01-05
- Inventor: Qing Liu
- Applicant: STMICROELECTRONICS, INC.
- Applicant Address: US TX Coppell
- Assignee: STMICROELECTRONICS, INC.
- Current Assignee: STMICROELECTRONICS, INC.
- Current Assignee Address: US TX Coppell
- Agency: Seed IP Law Group LLP
- Main IPC: H01L21/82
- IPC: H01L21/82 ; H01L29/66 ; H01L29/78 ; H01L21/8234

Abstract:
A dual width SOI FinFET is disclosed in which different portions of a strained fin have different widths. A method of fabrication of such a dual width FinFET entails laterally recessing the strained fin in the source and drain regions using a wet chemical etching process so as to maintain a high degree of strain in the fin while trimming the widths of fin portions in the source and drain regions to less than 5 nm. The resulting FinFET features a wide portion of the fin in the channel region underneath the gate, and a narrower portion of the fin in the source and drain regions. An advantage of the narrower fin is that it can be more easily doped during the growth of the epitaxial raised source and drain regions.
Public/Granted literature
- US20180076306A1 DUAL WIDTH FINFET Public/Granted day:2018-03-15
Information query
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