Invention Grant
- Patent Title: Test-response comparison circuit and scan data transfer scheme in a DFT architecture for micro LED based display panels
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Application No.: US16281996Application Date: 2019-02-21
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Publication No.: US10891884B1Publication Date: 2021-01-12
- Inventor: Bo Yang , Xiang Lu , Andrew J. Copperhall , Henry C. Jen , Karthik Manickam , Sagar Nataraj , Shriram Vijayakumar , Derek K. Shaeffer
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Jaffery Watson Mendonsa & Hamilton LLP
- Main IPC: G09G3/00
- IPC: G09G3/00 ; G09G3/32 ; G01R31/3185 ; G01R31/317 ; G01R31/58
Abstract:
Design-for-test (DFT) architectures, and methods of testing an array of chips, which may be identical, are described. In an embodiment, a comparison circuit includes a plurality of comparators to compare scan-data out (SDO) data streams with an expected data stream and transmit a compared data stream that is indicated of whether or not an error exists in any of the SDO data streams.
Information query
