Invention Grant
- Patent Title: Metal resistor and self-aligned gate edge (SAGE) architecture having a metal resistor
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Application No.: US16318107Application Date: 2016-09-29
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Publication No.: US10892261B2Publication Date: 2021-01-12
- Inventor: Walid M. Hafez , Roman W. Olac-Vaw , Joodong Park , Chen-Guan Lee , Chia-Hong Jan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2016/054543 WO 20160929
- International Announcement: WO2018/063259 WO 20180405
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L27/06 ; H01L21/8234 ; H01L49/02 ; H01L29/66 ; H01L29/78

Abstract:
Metal resistors and self-aligned gate edge (SAGE) architectures having metal resistors are described. In an example, a semiconductor structure includes a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is over a first of the plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A gate edge isolation structure is laterally between and in contact with the first gate structure and the second gate structure. The gate edge isolation structure is on the trench isolation region and extends above an uppermost surface of the first gate structure and the second gate structure. A metal layer is on the gate edge isolation structure and is electrically isolated from the first gate structure and the second gate structure.
Public/Granted literature
- US20200066712A1 METAL RESISTOR AND SELF-ALIGNED GATE EDGE (SAGE) ARCHITECTURE HAVING A METAL RESISTOR Public/Granted day:2020-02-27
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