Invention Grant
- Patent Title: Low-power and low-latency device enumeration with cartesian addressing
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Application No.: US15956708Application Date: 2018-04-18
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Publication No.: US10924541B2Publication Date: 2021-02-16
- Inventor: Lalan Jee Mishra , James Panian , Richard Wietfeldt
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: H04L29/08
- IPC: H04L29/08 ; G06F13/42 ; H04L29/12

Abstract:
An enumeration technique is provided that requires no pre-assignment of addresses to slave devices connected through P2P links to a host device. With regard to any P2P link between devices, one device has a master interface and the remaining device has a slave interface. To distinguish between the master and slave interfaces, a master/slave status bit may be used. Each P2P link has a link ID that may be concatenated with the status bit for a corresponding interface (slave or master) to form a node ID. The host device receives a unique concatenated address from each slave device that represents a concatenation of the node ID for the slave and the node ID for any intervening interfaces between the slave device and the host device. The host device then assigns a unique Cartesian address to each slave device.
Public/Granted literature
- US20180241816A1 LOW-POWER AND LOW-LATENCY DEVICE ENUMERATION WITH CARTESIAN ADDRESSING Public/Granted day:2018-08-23
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