Invention Grant
- Patent Title: Self-aligned inner spacer on gate-all-around structure and methods of forming the same
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Application No.: US16439909Application Date: 2019-06-13
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Publication No.: US10930755B2Publication Date: 2021-02-23
- Inventor: Tsungyu Hung , Pang-Yen Tsai , Pei-Wei Lee
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/02 ; H01L27/088 ; H01L29/78 ; H01L29/06 ; H01L21/306 ; H01L29/423

Abstract:
Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer comprising different semiconductor materials, and the fin includes a channel region and a source/drain region; forming a dummy gate structure over the substrate and the fin; etching a portion of the fin in the source/drain region; selectively removing an edge portion of the second semiconductor layer in the channel region of the fin such that the second semiconductor layer is recessed, and an edge portion of the first semiconductor layer is suspended; performing a reflow process to the first semiconductor layer to form an inner spacer, wherein the inner spacer forms sidewall surfaces of the source/drain region of the fin; and epitaxially growing a sour/drain feature in the source/drain region.
Public/Granted literature
- US20200168722A1 Self-Aligned Inner Spacer on Gate-All-Around Structure and Methods of Forming the Same Public/Granted day:2020-05-28
Information query
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