Invention Grant
- Patent Title: Method of manufacturing MOS transistor spacers
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Application No.: US16228032Application Date: 2018-12-20
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Publication No.: US10930757B2Publication Date: 2021-02-23
- Inventor: Arnaud Regnier , Dann Morillon , Franck Julien , Marjorie Hesse
- Applicant: STMICROELECTRONICS (ROUSSET) SAS
- Applicant Address: FR Rousset
- Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee: STMICROELECTRONICS (ROUSSET) SAS
- Current Assignee Address: FR Rousset
- Agency: Seed Intellectual Property Law Group LLP
- Priority: FR1850048 20180104
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/28 ; H01L29/423 ; H01L21/84 ; H01L27/12 ; H01L29/786 ; H01L21/8234 ; H01L29/417 ; H01L29/78
Abstract:
A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.
Public/Granted literature
- US20190207014A1 MOS TRANSISTOR SPACERS AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2019-07-04
Information query
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