Systems, devices, and methods for data transfer between memory devices on a shared bus are provided. In one aspect, a system includes first and second memory devices and a shared bus. A host device is configured to send at least one control signal through the shared bus to the first and second memory devices, and the control signal specifies data to be transferred from the first memory device to the second memory device. In response to receiving the control signal, the first memory device is configured to read and transmit the data to the shared bus, and the second memory device is configured to receive the data from the shared bus and write the data in the second memory device. The data is transferred directly from the first memory device to the second memory device through the shared bus without passing through the host device.