Invention Grant
- Patent Title: Method of forming a transistor
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Application No.: US16918903Application Date: 2020-07-01
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Publication No.: US10937911B2Publication Date: 2021-03-02
- Inventor: Durai Vishak Nirmal Ramaswamy
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/165 ; H01L29/36 ; H01L21/02 ; H01L29/66 ; H01L21/324 ; H01L29/423
Abstract:
A transistor comprises a pair of source/drain regions having a channel there-between. A transistor gate construction is operatively proximate the channel. The channel comprises Si1-yGey, where “y” is from 0 to 0.6. At least a portion of each of the source/drain regions comprises Si1-xGex, where “x” is from 0.5 to 1. Other embodiments, including methods, are disclosed.
Public/Granted literature
- US20200335634A1 Method of Forming A Transistor Public/Granted day:2020-10-22
Information query
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