Invention Grant
- Patent Title: Method for making semiconductor device with sidewall recess and related devices
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Application No.: US15863079Application Date: 2018-01-05
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Publication No.: US10943885B2Publication Date: 2021-03-09
- Inventor: Jefferson Talledo
- Applicant: STMICROELECTRONICS, INC.
- Applicant Address: PH Calamba
- Assignee: STMICROELECTRONICS, INC.
- Current Assignee: STMICROELECTRONICS, INC.
- Current Assignee Address: PH Calamba
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L21/78 ; H01L23/495 ; H01L21/48 ; H01L23/31
Abstract:
A method is for making a semiconductor device. The method may include providing a lead frame having a recess, forming a sacrificial material in the recess of the lead frame, and mounting an IC on the lead frame. The method may include encapsulating the IC and the lead frame, removing portions of the lead frame to define lead frame contacts for the IC, and removing the sacrificial material to define for each lead frame contact a solder anchoring tab extending outwardly at a lower region and defining a sidewall recess between opposing portions of the solder anchoring tab and the encapsulation material.
Public/Granted literature
- US20180130767A1 METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH SIDEWALL RECESS AND RELATED DEVICES Public/Granted day:2018-05-10
Information query
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