- 专利标题: Bias circuit, image formation device and image forming apparatus
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申请号: US16574436申请日: 2019-09-18
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公开(公告)号: US10948854B2公开(公告)日: 2021-03-16
- 发明人: Hiroshi Okamura
- 申请人: Hiroshi Okamura
- 申请人地址: JP Kanagawa
- 专利权人: Hiroshi Okamura
- 当前专利权人: Hiroshi Okamura
- 当前专利权人地址: JP Kanagawa
- 代理机构: IPUSA, PLLC
- 优先权: JPJP2018-182880 20180927
- 主分类号: G03G15/16
- IPC分类号: G03G15/16 ; G03G15/00 ; G05F3/18 ; G03G21/16 ; H01L29/866
摘要:
A bias circuit includes one or more first Zener diodes electrically coupled to a member provided in a replacement unit, the one or more first Zener diodes being coupled in series. When the replacement unit is removably attached to a main unit including a power supply that has one or more second Zener diodes coupled in series, the first Zener diodes are electrically coupled to the second Zener diodes in parallel to change a bias voltage to be applied to the member, the bias voltage being supplied by the power supply. A total absolute value of breakdown voltages across the first Zener diodes is lower than a total absolute value of breakdown voltages across the second Zener diodes.
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