Invention Grant
- Patent Title: Lithography process monitoring method
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Application No.: US16227939Application Date: 2018-12-20
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Publication No.: US10962892B2Publication Date: 2021-03-30
- Inventor: Chih-Jie Lee , Shih-Chun Huang , Shih-Ming Chang , Ken-Hsien Hsieh , Yung-Sung Yen , Ru-Gun Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: G03F9/00
- IPC: G03F9/00 ; G03F7/20

Abstract:
A method of performing a lithography process includes providing a test pattern. The test pattern includes a first set of lines arranged at a first pitch, a second set of lines arranged at the first pitch, and further includes at least one reference line between the first set of lines and the second set of lines. The test pattern is exposed with a radiation source providing an asymmetric, monopole illumination profile to form a test pattern structure on a substrate. The test pattern structure is then measured and a measured distance correlated to an offset of a lithography parameter. A lithography process is adjusted based on the offset of the lithography parameter.
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