- 专利标题: Wafer reconfiguration during a coating process or an electric plating process
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申请号: US15374622申请日: 2016-12-09
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公开(公告)号: US10964580B2公开(公告)日: 2021-03-30
- 发明人: Dyi-Chung Hu
- 申请人: Dyi-Chung Hu
- 申请人地址: TW Hsinchu
- 专利权人: Dyi-Chung Hu
- 当前专利权人: Dyi-Chung Hu
- 当前专利权人地址: TW Hsinchu
- 代理机构: JCIPRNET
- 主分类号: B32B3/02
- IPC分类号: B32B3/02 ; B32B9/00 ; H01L21/02 ; H01L21/683 ; B32B9/04 ; B32B15/04 ; B32B17/06 ; B32B3/30 ; B32B15/01 ; B32B15/18 ; B32B15/20 ; G03F7/20 ; H01L21/027 ; H01L21/288
摘要:
At least one wafer is embedded in a carrier to eliminate or at least reduce edge effect. The wafer reconfiguration is designed to improve a quality not only for spin coating process but also for electric plating process. An edge bead is formed on top of the carrier instead of being formed on top of the wafer so that a full top surface of the wafer can be active to the fabrication of chips and therefore more chips are yielded for a single wafer. The backside of the wafer is not contaminated by the coating according to the present invention. Further, dummy circuits can be made on top of the carrier so that electric plating uniformity for full area of a wafer can be improved.
公开/授权文献
- US20170092526A1 WAFER RECONFIGURATION 公开/授权日:2017-03-30
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